pca9665 NXP Semiconductors, pca9665 Datasheet - Page 62

• Manufacturer Part Number: pca9665
• Description: Fm+ Parallel Bus To I2c-bus Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9665_2
Product data sheet
Fig 20. Bus timing diagram; Unbuffered Master Receiver mode
Fig 21. Bus timing diagram; Unbuffered Slave Transmitter mode
Fig 22. Bus timing diagram; Unbuffered Slave Receiver mode
(1) As defined in I2CADR register.
(1) As defined in I2CADR register.
Master PCA9665 reads data from slave transmitter.
External master receiver reads data from PCA9665.
Slave PCA9665 is written to by external master transmitter.
SDA
condition
SCL
INT
START
SDA
condition
SDA
condition
SCL
SCL
INT
INT
START
START
from slave PCA9665
from slave PCA9665
7-bit address
7-bit address
7-bit address
R/W = 0
R/W = 1
from slave
R/W = 1
(1)
(1)
ACK
ACK
ACK
interrupt
interrupt
interrupt
Rev. 02 — 7 December 2006
first byte
first byte
first byte
ACK
ACK
ACK
interrupt
interrupt
interrupt
from master receiver
from master receiver
n byte
Fm+ parallel bus to I
n byte
n byte
ACK
no ACK
no ACK
interrupt
interrupt
PCA9665
STOP
condition
© NXP B.V. 2006. All rights reserved.
2
002aab032
002aab033
(after STOP)
STOP
condition
STOP
condition
C-bus controller
002aab034
interrupt
62 of 91