pca9665 NXP Semiconductors, pca9665 Datasheet - Page 88

• Manufacturer Part Number: pca9665
• Description: Fm+ Parallel Bus To I2c-bus Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 58.
PCA9665_2
Product data sheet
Document ID
Modifications:
(continued)
PCA9665_1
Revision history
Release date
20060807
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Table
– changed Min value for t
– changed Min value for t
– changed Min value for t
– changed Min value for t
– changed Min value for t
– changed Min value for t
Table 50 “Dynamic characteristics (2.5 volt)
– added sub-sections “Initialization timing” and “Serial interface initialization timing”
– sub-section “INT timing”: changed t
– sub-section “INT timing”: changed t
Table
– changed Min value for t
– changed Min value for t
– changed Min value for t
– changed Min value for t
– changed Min value for t
– changed Min value for t
Figure 36 “Reset timing”
Figure 38 “Bus timing (read cycle)”
Added (new)
Table 51 “I
– t
– t
– t
Added (new)
Figure 43 “Test circuitry for switching times”
Table
Added (new)
0.05 s
VD;ACK
VD;DAT
SP
49, sub-section “Bus timing”:
50, sub-section “Bus timing”:
52: modified test t
(Max) changed: (Fast-mode Plus) from “<tbd>” to “50 ns”
…continued
2
(Min) changed: (Fast-mode Plus) from “<tbd>” to “50 ns”
(Min) changed: (Standard-mode) from 0.3 s to 0.05 s; (Fast-mode) from 0.1 s to
C-bus frequency and timing
Figure 39 “Parallel bus timing (write cycle)”
Figure 42 “I
Figure 44 “Test circuitry for open-drain switching times”
Data sheet status
Objective data sheet
d(DV)
modified
2
C-bus timing diagram”
Rev. 02 — 7 December 2006
h(A)
w(RDL)
w(WRL)
su(Q)
w(RDH)
w(WRH)
h(A)
w(RDL)
w(WRL)
su(Q)
w(RDH)
w(WRH)
changed S1 value from “6 V” to “V
from 7 ns to 13 ns
from 9 ns to 13 ns
from 7 ns to 12 ns
from 8 ns to 12 ns
from 7 ns to 20 ns
from 9 ns to 20 ns
from 12 ns to 18 ns
from 12 ns to 18 ns
from 7 ns to 20 ns
from 9 ns to 20 ns
from 12 ns to 18 ns
from 12 ns to 18 ns
modified
as(int)
das(int)
specifications”:
[1][2][3]
from (Typ) “<tbd>” to (Max) “550 ns”
modified (at switch, “6.0 V” changed to “V
from (Typ) “<tbd>” to (Max) “20 ns”
”:
Fm+ parallel bus to I
Change notice
-
DD
2”
and
Table
53.
PCA9665
© NXP B.V. 2006. All rights reserved.
2
C-bus controller
Supersedes
-
DD
2”
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