pca9691 NXP Semiconductors, pca9691 Datasheet - Page 10

• Manufacturer Part Number: pca9691
• Description: 8-bit A/d And D/a Converter
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9691_1
Product data sheet
Fig 10. A/D conversion sequence
protocol
SDA
SCL
S
7.4 A/D conversion
ADDRESS
1
The new AOUT value is valid, at the latest, after 8.0 s so before the rising edge of the 8th
bit of the next transferred byte. Therefore, at the full speed of the I
output is valid under all circumstances between the rising edges of the 8th bit and the
acknowledge bit.
The A/D Converter (ADC) makes use of the successive approximation conversion
technique. The on-chip DAC and a high-gain comparator are used temporarily during an
A/D conversion cycle.
An A/D conversion cycle is always started after sending a valid read mode address to a
PCA9691. The A/D conversion cycle is triggered at the trailing edge of the acknowledge
clock pulse and is executed while transmitting the result of the previous conversion (see
Figure
Once a conversion cycle is triggered, an input voltage sample of the selected channel is
stored on the chip and is converted to the corresponding 8-bit binary code. Samples
picked up from differential inputs are converted to an 8-bit two’s complement code (see
Figure 11
The conversion result is stored in the ADC data register and awaits transmission. If the
auto-increment flag is set the next channel is selected.
2
Fig 9.
V
AOUT
SCL
10).
1
6
8
D/A conversion sequence, example of worst case
and
A
9
7
Figure
conversion of byte 1
1
sampling byte 1
converted byte
> 8T
DATA BYTE 0
8
transmission
of previously
12).
osc
Rev. 01 — 8 April 2008
A
1
< 18T
A
2
9
osc
conversion of byte 2
1
3
DATA BYTE 1
sampling byte 2
transmission
of byte 1
4
5
t
A
c(DAC)
6
9
8-bit A/D and D/A converter
conversion of byte 3
1
sampling byte 3
7
DATA BYTE 2
transmission
2
of byte 2
C-bus, the analog
valid
8
PCA9691
© NXP B.V. 2008. All rights reserved.
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