pca9691 NXP Semiconductors, pca9691 Datasheet - Page 14

• Manufacturer Part Number: pca9691
• Description: 8-bit A/d And D/a Converter
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9691_1
Product data sheet
Fig 15. System configuration
SCL
SDA
7.7.4 Acknowledge
7.7.5 I
TRANSMITTER /
RECEIVER
MASTER
The number of data bytes transferred between the start and stop conditions from
transmitter to receiver is not limited. Each data byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter
whereas the master also generates an extra acknowledge related clock pulse. A slave
receiver which is addressed must generate an acknowledge after the reception of each
byte. Also a master must generate an acknowledge after the reception of each byte that
has been clocked out of the slave transmitter. The device that acknowledges has to pull
down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse. A master receiver
must signal an end of data to the transmitter by not generating an acknowledge on the last
byte that has been clocked out of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop condition (see
After a start condition a valid hardware address has to be sent to a PCA9691 device. The
read/write bit defines the direction of the following single or multiple byte data transfer. For
the format and the timing of the start condition (S), the stop condition (P) and the
acknowledge bit (A) refer to the I
is terminated by sending either a stop condition or the start condition of the next data
transfer.
2
Fig 16. Acknowledgement on the I
C-bus protocol
by transmitter
data output
by receiver
data output
SCL from
master
RECEIVER
SLAVE
condition
START
S
Rev. 01 — 8 April 2008
TRANSMITTER /
RECEIVER
2
SLAVE
C-bus characteristics. In the write mode a data transfer
1
2
C-bus
2
TRANSMITTER
MASTER
not acknowledge
8-bit A/D and D/A converter
acknowledge
8
TRANSMITTER /
RECEIVER
MASTER
acknowledgement
clock pulse for
PCA9691
Figure
© NXP B.V. 2008. All rights reserved.
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