adv7174 Analog Devices, Inc., adv7174 Datasheet - Page 10

• Manufacturer Part Number: adv7174
• Description: Chip Scale Pal/ntsc Video Encoder With Advanced Power Management
• Manufacturer: Analog Devices, Inc.

ADV7174/ADV7179
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Mnemonic
P7–P0
CLOCK
HSYNC
FIELD/VSYNC
BLANK
SCRESET/RTC
V
R
COMP
DAC A
DAC B
DAC C
SCLOCK
SDATA
ALSB
RESET
TTX
TTXREQ
V
GND
SET
REF
AA
Input/
Output
I
I
I/O
I/O
I/O
I
I/O
I
O
O
O
O
I
I/O
I
I
I
O
P
G
Function
8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7–P0). P0 is the LSB.
TTL Clock Input. Requires a stable 27 MHz reference clock for standard operation. Alternatively, a 24.5454 MHz
(NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
HSYNC (Modes 1 and 2) Control Signal. This pin may be configured to output (master mode) or accept (slave
mode) sync signals.
Dual Function FIELD (Mode 1) and VSYNC (Mode 2) Control Signal. This pin may be configured to output
(master mode) or accept (slave mode) these control signals.
Video Blanking Control Signal. The pixel inputs are ignored when this is Logic 0. This signal is optional.
This pin can be configured as an input by setting MR22 and MR21 of Mode Register 2. It can be configured as a
subcarrier reset pin, in which case a low-to-high transition on this pin resets the subcarrier to Field 0.
Alternatively, it can be configured as a real-time control (RTC) input.
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
A 150 Ω resistor connected from this pin to GND is used to control full-scale amplitudes of the video signals.
Compensation Pin. Connect a 0.1 µF capacitor from COMP to V
power mode, the value of the COMP capacitor can be lowered to as low as 2.2 nF.
DAC Output (see Table 13)
DAC Output (see Table 13).
DAC Output (see Table 13).
MPU Port Serial Interface Clock Input.
MPU Port Serial Data Input/Output.
TTL Address Input. This signal sets up the LSB of the MPU address.
This input resets the on-chip timing generator and sets the ADV7174/ADV7179 into default mode. This is NTSC
operation, Timing Slave Mode 0, 8-bit operation, 2× composite out signals. DACs A, B, and C are enabled.
Teletext Data.
Teletext Data Request Signal/Defaults to GND when Teletext Not Selected.
Power Supply (2.8 V or 3.3 V).
Ground Pin.
CLOCK
GND
GND
GND
GND
V
V
AA
P5
P6
P7
AA
10
1
2
3
4
5
6
7
8
9
40
PIN 1
INDICATOR
11 12
Figure 5. Pin Configurations
39
ADV7174/ADV7179
Rev. A | Page 10 of 52
13
38
(Not to Scale)
37
14
TOP VIEW
LFCSP
36
15
35
16
34
17
33 32
18 19
31
20
30
29
28
27
26
25
24
23
22
21
DAC B
GND
COMP
V
DAC A
V
V
DAC C
SDATA
SCLOCK
REF
AA
AA
AA
. For optimum dynamic performance in low