adv7174 Analog Devices, Inc., adv7174 Datasheet - Page 23

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adv7174

Manufacturer Part Number
adv7174
Description
Chip Scale Pal/ntsc Video Encoder With Advanced Power Management
Manufacturer
Analog Devices, Inc.
Datasheet

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Mode 2: Master Option HSYNC , VSYNC , BLANK
(Timing Register 0 TR0 = X X X X X 1 0 1)
In this mode, the ADV7174/ADV7179 can generate horizontal
and vertical SYNC signals. A coincident low transition of both
HSYNC and VSYNC inputs indicates the start of an odd field. A
VSYNC low transition when HSYNC is high indicates the start
of an even field. The BLANK signal is optional. When the
HSYNC
VSYNC
BLANK
HSYNC
VSYNC
BLANK
PIXEL
DATA
PIXEL
DATA
NTSC = 16 u CLOCK/2
PAL = 12 u CLOCK/2
NTSC = 16 u CLOCK/2
PAL = 12 u CLOCK/2
Figure 29. Timing Mode 2 Even-to-Odd Field Transition Master/Slave
Figure 30. Timing Mode 2 Odd-to-Even Field Transition Master/Slave
PAL = 132 u CLOCK/2
NTSC = 122 u CLOCK/2
Rev. A | Page 23 of 52
PAL = 132 u CLOCK/2
NTSC = 122 u CLOCK/2
PAL = 864 u CLOCK/2
NTSC = 858 u CLOCK/2
BLANK input is disabled, the ADV7174/ADV7179 automatically
blanks all normally blank lines as per CCIR-624. Mode 2 is
illustrated in Figure 27 (NTSC) and Figure 28 (PAL). Figure 29
illustrates the HSYNC , BLANK , and VSYNC for an even-to-odd
field transition relative to the pixel data. Figure 30 illustrates the
HSYNC , BLANK , and VSYNC for an odd-to-even field
transition relative to the pixel data.
Cb
Y
Cr
Y
Cb
Cb
Y
Cr
ADV7174/ADV7179
Y

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