adsp-21367kbpz-2a Analog Devices, Inc., adsp-21367kbpz-2a Datasheet - Page 39

• Manufacturer Part Number: adsp-21367kbpz-2a
• Description: Sharc Processors
• Manufacturer: Analog Devices, Inc.

Pulse-Width Modulation Generators
Table 35. PWM Timing
Sample Rate Converter—Serial Input Port
The SRC input signals (SCLK, FS, and SDATA) are routed from
the DAI_P20–1 pins using the SRU. Therefore, the timing spec-
ifications provided in
Table 36. SRC, Serial Input Port
1
Parameter
Switching Characteristics
t
t
Parameter
Timing Requirements
t
t
t
t
t
t
DATA, SCLK, FS can come from any of the DAI pins. SCLK and FS can also come via PCG or SPORTs. PCG’s input can be either CLKIN or any of the DAI pins.
PWMW
PWMP
SRCSFS
SRCHFS
SRCSD
SRCHD
SRCCLKW
SRCCLK
1
1
1
1
FS Setup Before SCLK Rising Edge
FS Hold After SCLK Rising Edge
SDATA Setup Before SCLK Rising Edge
SDATA Hold After SCLK Rising Edge
Clock Width
Clock Period
PWM Output Pulse Width
PWM Output Period
OUTPUTS
Table 36
PWM
are valid at the DAI_P20–1 pins.
DAI_P20
DAI_P20
DAI_P20
(SDATA)
(SCLK)
(FS)
-
-
-
1
1
1
Figure 27. SRC Serial Input Port Timing
Rev. A | Page 39 of 56 | August 2006
t
PWMW
Figure 26. PWM Timing
t
SRCCLKW
t
SRCSFS
t
SRCSD
t
PWMP
Min
t
2 × t
PCLK
t
SRCCLK
SAMPLE EDGE
– 2
PCLK
ADSP-21367/ADSP-21368/ADSP-21369
– 1.5
t
SRCHFS
t
SRCHD
Min
4
5.5
4
5.5
9
24
Max
(2
(2
16
16
– 2) × t
– 1) × t
Max
PCLK
PCLK
– 2
– 1.5
Unit
ns
ns
ns
ns
ns
ns
Unit
ns
ns