admcf340 Analog Devices, Inc., admcf340 Datasheet - Page 36

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admcf340

Manufacturer Part Number
admcf340
Description
Dashdsptm 64-lead Flash Mixed-signal Dsp With Enhanced Analog Front End
Manufacturer
Analog Devices, Inc.
Datasheet
ADMCF340
Default bit values are shown; if no value is shown, the bit field is undefined at reset.
1 = INDEPENDENT MODE
0 = OFFSET MODE
1 = CLKOUT RATE
0 = SPORT MODE
1 = UART MODE
0 = CLKIN RATE
0 = STANDARD
1 = SP1 MODE
1 = VOLTAGE
1 = VOLTAGE
1 = REVERSE
1 = VOLTAGE
0 = SPORT
0 = I
0 = I
0 = I
0 = PHA0
1 = PHA1
SENSE
SENSE
SENSE
MODE SELECT
0 = 1ST HALF OF PWM
1 = 2ND HALF OF PWM
MODE SELECT
SPI CLOCK
CHANNEL 3
SELECTION
CHANNEL 2
SELECTION
CHANNEL 1
SELECTION
CYCLE
CYCLE
SPI MODE
SPI CLOCK
POLARITY
COUNTER
SPORT 0
SPORT 0
AUX PWM
ADC
PHASE
15
15
15
0
0
0
14
14
14
0
0
0
15
0
13
13
13
0
0
0
Figure 28. Configuration of Status/Control Registers
14
0
12
12
12
0
0
0
PWM TIMER
13
0
11
11
11
0
STATUS
0
0
12
0
10
10
10
0
0
0
11
0
0
9
0
9
0
9
WDTIMER (W)
SYSSTAT (R)
IRQFLAG (R)
10
0
8
0
8
8
0
0
MODECTRL (R/W)
9
0
7
0
0
0
7
7
8
0
6
0
0
0
6
6
–36–
7
0
5
0
5
0
5
0
6
0
0
0
4
4
4
0
0
5
3
0
3
0
3
0
4
1
2
2
0
2
0
0
3
0
1
1
1
0
2
0
0
0
0
0
0
1
0
WATCHDOG
PIN STATUS
MODE SELECT
DM (0x2016)
DM (0x2018)
PWM UPDATE
PWMTRIP INTERRUPT
PWMSYNC INTERRUPT
PWMTRIP
DM (0x2017)
SPORT1 MODE
STATUS
INTERRUPT
INTERRUPT
PWMSYNC
PWMTRIP
CONTROL
ADC MUX
0
0
SELECT
DM (0x2015)
ADC MUX CONTROL*
0 = LOW
1 = HIGH
0 = NORMAL
1 = WATCHDOG RESET
0 = DISABLE
1 = ENABLE
0 = DISABLE
1 = ENABLE
ADC MUX CONTROL*
0 = BOOT MODE
1 = UART MODE
0 = SINGLE UPDATE MODE
1 = DOUBLE UPDATE MODE
OCCURRED
0 = NO INTERRUPT
1 = INTERRUPT OCCURRED
REV. 0

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