xa3s1400a-4ftg256q Xilinx Corp., xa3s1400a-4ftg256q Datasheet - Page 24

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xa3s1400a-4ftg256q

Manufacturer Part Number
xa3s1400a-4ftg256q
Description
Xa Spartan-3a Automotive Fpga Family Data Sheet
Manufacturer
Xilinx Corp.
Datasheet
Output Propagation Times
Table 23: Timing for the IOB Output Path
24
Notes:
1.
2.
Clock-to-Output Times
Propagation Times
Set/Reset Times
T
Symbol
The numbers in this table are tested using the methodology presented in
Table 8
This time requires adjustment whenever a signal standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data
Output. When this is true, add the appropriate Output adjustment from
T
T
T
IOGSRQ
IOCKP
IOSRP
IOOP
and
Table
When reading from the Output Flip-Flop
(OFF), the time from the active transition at
the OCLK input to data appearing at the
Output pin
The time it takes for data to travel from the
IOB’s O input to the Output pin
Time from asserting the OFF’s SR input to
setting/resetting data at the Output pin
Time from asserting the Global Set Reset
(GSR) input on the
STARTUP_SPARTAN3A primitive to
setting/resetting data at the Output pin
11.
Description
www.xilinx.com
LVCMOS25
drive, Fast slew rate
LVCMOS25
drive, Fast slew rate
LVCMOS25
drive, Fast slew rate
Conditions
Table
(2)
(2)
(2)
Table 26
, 12 mA output
, 12 mA output
, 12 mA output
25.
and are based on the operating conditions set forth in
Device
All
All
All
DS681 (v1.1) February 3, 2009
Speed Grade
Product Specification
Max
3.13
2.91
3.89
9.65
-4
Units
ns
ns
ns
ns
R

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