ksz8021rnli Micrel Semiconductor, ksz8021rnli Datasheet - Page 16

• Manufacturer Part Number: ksz8021rnli
• Description: 10base-t/100base-tx Phy With Rmii Support
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
So long as carrier detection criteria are met, CRS_DV remains asserted continuously from the first recovered dibit of the
frame through the final recovered dibit, and it is negated prior to the first REF_CLK that follows the final dibit. The data on
RXD[1:0] is considered valid once CRS_DV is asserted. However, since the assertion of CRS_DV is asynchronous
relative to REF_CLK, the data on RXD[1:0] is "00" until proper receive signal decoding takes place.
Receive Data [1:0] (RXD[1:0])
RXD[1:0] transitions synchronously with respect to REF_CLK. For each clock period in which CRS_DV is asserted,
RXD[1:0] transfers two bits of recovered data from the PHY.
RXD[1:0] is "00" to indicate idle when CRS_DV is de-asserted. Values other than “00” on RXD[1:0] while CRS_DV is de-
asserted are ignored by the MAC.
Receive Error (RXER)
RXER is asserted for one or more REF_CLK periods to indicate that a Symbol Error (e.g., a coding error that a PHY is
capable of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the
frame presently being transferred from the PHY.
RXER transitions synchronously with respect to REF_CLK. While CRS_DV is de-asserted, RXER has no effect on the
MAC.
Collision Detection
The MAC regenerates the COL signal of the MII from TXEN and CRS_DV.
RMII Signal Diagram – for KSZ8021/31RNL
The KSZ8021/31RNL RMII pin connections to the MAC are shown in the following figures for RMII – 25MHz Clock Mode
and RMII – 50MHz Clock Mode.
RMII – 25MHz Clock Mode
The KSZ8031RNL is configured to RMII – 25MHz Clock Mode after it is powered up or hardware reset with the following:
The KSZ8021RNL is configured optionally to RMII – 25MHz Clock Mode after it is powered up or hardware reset and
software programmed with the following:
August 2010
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A 25MHz crystal connected to XI, XO (Pins 8, 7), or an external 25MHz clock source (oscillator) connected to XI
A 25MHz crystal connected to XI, XO (pins 8, 7), or an external 25MHz clock source (oscillator) connected to XI
Register 1Fh, bit [7] programmed to ‘0’ to select RMII – 25MHz Clock Mode
Figure 2. KSZ8021/31RNL RMII Interface (RMII – 25MHz Clock Mode)
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KSZ8021RNL / KSZ8031RNL
M9999-082710-1.0