ksz8021rnli Micrel Semiconductor, ksz8021rnli Datasheet - Page 9

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ksz8021rnli

Manufacturer Part Number
ksz8021rnli
Description
10base-t/100base-tx Phy With Rmii Support
Manufacturer
Micrel Semiconductor
Datasheet
Micrel, Inc.
Pin Description – KSZ8021RNL / KSZ8031RNL
August 2010
Pin Number
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
PHYAD[1:0]
VDDA_3.3
Pin Name
CRS_DV /
REF_CLK
VDD_1.2
VDDIO
INTRP
RXER
REXT
MDIO
RXD1
RXD0
RXM
MDC
TXM
RXP
TXP
XO
XI
Ipu/Opu
Type
Ipd/O
Ipu/O
Ipd/O
Ipd/O
Ipd/O
I/O
I/O
I/O
I/O
I/O
O
P
P
P
I
I
I
(1)
Pin Function
1.2V core V
Decouple with 2.2uF and 0.1uF capacitors-to-ground.
3.3V analog V
Physical receive or transmit signal (- differential)
Physical receive or transmit signal (+ differential)
Physical transmit or receive signal (- differential)
Physical transmit or receive signal (+ differential)
Crystal feedback – for 25 MHz crystal
This pin is a no connect if oscillator or external clock source is used.
RMII – 25MHz Mode:
RMII – 50MHz Mode:
For unmanaged mode (power-up default setting),
After power-up, both the KSZ8021RNL and KSZ8031RNL can be programmed via
PHY register 1Fh bit [7] to either the 25MHz mode or 50MHz mode.
See also REF_CLK (pin 16) description.
Set physical transmit output current
Connect a 6.49KΩ resistor-to-ground on this pin.
Management Interface (MII) Data I/O
This pin has a weak pull-up, is open drain like, and requires an external 1.0KΩ pull-
up resistor.
Management Interface (MII) Clock Input
This clock pin is synchronous to the MDIO data pin.
RMII Receive Data Output[1]
RMII Receive Data Output[0]
3.3V, 2.5V or 1.8V digital V
RMII Mode:
Config Mode:
RMII – 25MHz Mode:
RMII – 50MHz Mode:
For unmanaged mode (power-up default setting),
After power-up, both KSZ8021RNL and KSZ8031RNL can be programmed via PHY
register 1Fh bit [7] to either 25MHz mode or 50MHz mode.
See also XI (pin 8) description.
RMII Receive Error Output
Interrupt Output: Programmable Interrupt Output
This pin has a weak pull-up, is open drain like, and requires an external 1.0KΩ pull-
up resistor.
KSZ8021RNL takes in the 50MHz clock on this pin.
KSZ8031RNL takes in the 25MHz crystal / clock on this pin.
KSZ8021RNL is in RMII – 50MHz mode and does not use this pin.
KSZ8031RNL is in RMII – 25MHz mode and outputs the 50MHz RMII
DD
DD
(power supplied by KSZ8021RNL / KSZ8031RNL)
.
Carrier Sense/Receive Data Valid Output /
The pull-up/pull-down value is latched as PHYAD[1:0] at the
de-assertion of reset. See “Strapping Options” section for details.
9
25MHz +/-50ppm Crystal / Oscillator / External Clock Input
50MHz +/-50ppm Oscillator / External Clock Input
This pin provides the 50MHz RMII reference clock output to
the MAC.
This pin is a no connect.
DD
(2)
(2)
reference clock on this pin.
KSZ8021RNL / KSZ8031RNL
M9999-082710-1.0

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