ml67q5003 Oki Semiconductor, ml67q5003 Datasheet - Page 8

• Manufacturer Part Number: ml67q5003
• Description: 32-bit Arm -based General Purpose Microcontrollers Ml675k Seriesml675001/ml67q5002/ml67q5003 32-bit Arm -based General Purpose Microcontrollers
• Manufacturer: Oki Semiconductor

ML675001/ML67Q5002/ML67Q5003
List of Pins
8
LQFP
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
2
3
4
5
6
7
8
9
• Oki Semiconductor
Pin
BGA
M2
M1
M3
A1
B1
C3
C1
D3
C2
D1
D2
G2
G4
G3
G1
H3
H4
H2
H1
K2
K3
K1
K4
N1
N2
N3
N4
E3
E1
E4
E2
F1
F2
F4
F3
L2
L1
L3
L4
L5
J2
J4
J1
J3
TEST1
PIOB[7]
FWR
RESET_N
VDD_IO
XD[0]
XD[1]
XD[2]
XD[3]
XD[4]
GND
CLKMD0
XD[5]
XD[6]
GND
XD[7]
CLKMD1
VDD_IO
XD[8]
XD[9]
XD[10]
VDD_CORE
NC
XD[11]
XD[12]
VDD_IO
XD[13]
XD[14]
XD[15]
XA[0]
XA[1]
XA[2]
XA[3]
GND
XA[4]
XA[5]
XA[6]
XA[7]
XA[8]
XA[9]
VDD_IO
XA[10]
XA[11]
XA[12]
Symbol
April 2004, Rev 2.0
GND
GND
GND
VDD
VDD
VDD
VDD
VDD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
–
–
I
I
I
I
Primary Function
Test mode input
General port (with interrupt function)
Test mode input
Reset input
IO power supply
External data bus
External data bus
External data bus
External data bus
External data bus
GND
Clock mope input
External data bus
External data bus
GND
External data bus
Clock mode input
I/O power supply
External data bus
External data bus
External data bus
CORE power supply
NC
External data bus
External data bus
I/O power supply
External data bus
External data bus
External data bus
External address output
External address output
External address output
External address output
GND
External address output
External address output
External address output
External address output
External address output
External address output
I/O power supply
External address output
External address output
External address output
Description
Symbol
SRXD
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Secondary Function
I/O
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
I
SIO receive signal
Description