ml671000 Oki Semiconductor, ml671000 Datasheet - Page 7

• Manufacturer Part Number: ml671000
• Description: Oki S Mcus - Ml671000oki S Cmos 32-bit Single-chip Microcontroller With Built-in Usb Device Controller
• Manufacturer: Oki Semiconductor

PIN DESCRIPTION (3)
1 Semiconductor
I/O Ports
USB Port
Debug
Interface
Interrupt
System
Control
Power Supply
Classification
P5.7/DTR
P5.6/RTS
P5.5/CTS
P5.4/DSR
P5.3/DCD
P5.2/RI
P5.1/OUT1
P5.0/OUT2
P6.7/nBACK
P6.6/nBREQ
P6.5/DACK1
P6.4/DACK0
P6.3/nDREQ1
P6.2/nDREQ0
P6.1
P6.0
P7.7
P7.6
P7.5
P7.4
P7.3
P7.2
P7.1
P7.0
D
D
TCK
TMS
TDI
TDO
nTRST
nEFIQ
nEA
nRST
DBSEL
TEST
V
V
DD
SS
Pin Name
I/O
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O Primary
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Function
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit 7 of port 5
DTR signal output pin for UART serial port
Bit 6 of port 5
RTS signal output pin for UART serial port
Bit 5 of port 5
CTS signal input pin for UART serial port
Bit 4 of port 5
DSR signal input pin for UART serial port
Bit 3 of port 5
DCD signal input pin for UART serial port
Bit 2 of port 5
RI signal input pin for UART serial port
Bit 1 of port 5
OUT1 signal output pin for UART serial port
Bit 0 of port 5
OUT2 signal output pin for UART serial port
Bit 7 of port 6
Bus release request acknowledged signal output pin
Bit 6 of port 6
Bus release request signal input pin
Bit 5 of port 6
Data transfer request 1 acknowledged signal output pin
Bit 4 of port 6
Data transfer request 0 acknowledged signal output pin
Bit 3 of port 6
Data transfer request 1 signal input pin
Bit 2 of port 6
Data transfer request 0 signal input pin
Bit 1 of port 6
Bit 0 of port 6
Bit 7 of port 7
Bit 6 of port 7
Bit 5 of port 7
Bit 4 of port 7
Bit 3 of port 7
Bit 2 of port 7
Bit 1 of port 7
Bit 0 of port 7
USB data I/O pins
Test clock input pin
Test mode select pin
Test data input pin
Test data output pin
Boundary scan logic reset input pin
External FIQ (high-speed interrupt) interrupt request signal input pin
Normally connected to ground
System reset signal input pin for this LSI device
During a system reset of this LSI device, this pin sets the bank 0 data
bus width. To set a 16-bit bus width, connect to V
width, connect to GND.
This pin sets the test and debug modes for this LSI device. Normally
connected to GND.
Power supply pin. Connect all V
Ground pin. Connect all V
SS
pins to GND.
Description
DD
pins to the power supply.
DD
. To set an 8-bit bus
FEDL671000-02
ML671000
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