mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 180
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mc68hc908bd48
Manufacturer Part Number
mc68hc908bd48
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908BD48.pdf
(288 pages)
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Multi-Master IIC Interface (MMIIC)
14.3 Features
14.4 I/O Pins
Data Sheet
180
Generic Pin Names:
MMIIC
SDA
SCL
This Multi-master IIC module uses the IICSCL clock line and the IICSDA
data line to communicate with external DDC host or IIC interface. These
two pins are shared with port pins PTD5 and PTD6 respectively. The
outputs of IICSDA and IICSCL pins are open-drain type — no clamping
diode is connected between the pin and internal V
data rate typically is 750k-bps. The maximum communication length and
the number of devices that can be connected are limited by a maximum
bus capacitance of 400pF.
The MMIIC module uses two I/O pins, shared with standard port I/O pins.
The full name of the MMIIC I/O pins are listed in
pin name appear in the text that follows.
•
•
•
•
•
•
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Table 14-1. Pin Name Conventions
Compatibility with multi-master IIC bus standard
Software controllable acknowledge bit generation
Interrupt driven byte by byte data transfer
Calling address identification interrupt
Auto detection of R/W bit and switching of transmit or receive
mode
Detection of START, repeated START, and STOP signals
Auto generation of START and STOP condition in master mode
Arbitration loss detection and No-ACK awareness in master mode
8 selectable baud rate master clocks
Automatic recognition of the received acknowledge bit
Multi-Master IIC Interface (MMIIC)
Full MCU Pin Names:
PTD6/IICSDA
PTD5/IICSCL
IICSCLE bit in PDCR ($0049)
IICDATE bit in PDCR ($0049)
Pin Selected for
IIC Function By:
MC68HC908BD48
Table
Freescale Semiconductor
DD
. The maximum
14-1. The generic
—
Rev. 2.1
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