mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 248

• Manufacturer Part Number: mc68hc908bd48
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Input/Output (I/O) Ports
17.7.2 Data Direction Register E
Data Sheet
248
NOTE:
Address:
SOG/TCH0 — SOG Output or TCH0 Input
Data direction register E (DDRE) determines whether each port E pin is
an input or an output. Writing a logic 1 to a DDRE bit enables the output
buffer for the corresponding port E pin; a logic 0 disables the output
buffer.
DDRE2–DDRE0 — Data Direction Register E Bits
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Figure 17-18
Reset:
Read:
Write:
The PTE0/SOG/TCH0 pin is the SOG input for the sync processor or
the input capture of the TIM channel 0. See
These read/write bits control port E data direction. Reset clears
DDRE2–DDRE0, configuring all port E pins as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
$000C
Bit 7
Figure 17-17. Data Direction Register E (DDRE)
0
0
shows the port E I/O logic.
Input/Output (I/O) Ports
= Unimplemented
6
0
0
5
0
0
4
0
0
3
0
0
17.7.3 Port E
MC68HC908BD48
DDRE2
Freescale Semiconductor
2
0
DDRE1
1
0
Options.
—
Rev. 2.1
DDRE0
Bit 0
0