mpc8360e Freescale Semiconductor, Inc, mpc8360e Datasheet - Page 59

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mpc8360e

Manufacturer Part Number
mpc8360e
Description
Mpc8360e Powerquicc Ii Pro Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Figure 40
Figure 41
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 41
Freescale Semiconductor
MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2
SPI inputs—Slave mode (external clock) input setup time
SPI inputs—Slave mode (external clock) input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal.
2. The symbols used for timing specifications follow the pattern of t
Timings are measured at the pin.
(reference)(state)
t
high state (H) until outputs (O) are valid (V).
NIKHOV
Note: The clock edge is selectable on SPI.
provides the AC test load for the SPI.
through
shows the SPI timing in slave mode (external clock).
Output Signals:
SPICLK (input)
Input Signals:
symbolizes the NMSI outputs internal timing (NI) for the time t
(See Note)
(See Note)
SPIMOSI
SPIMISO
for inputs and t
Figure 42
Figure 41. SPI AC Timing in Slave mode (External Clock) Diagram
Output
Characteristic
t
NEIVKH
represent the AC timing from
(first two letters of functional block)(reference)(state)(signal)(state)
Table 56. SPI AC Timing Specifications
Figure 40. SPI AC Test Load
Z
0
= 50 Ω
t
NEKHOV
t
NEIXKH
Table
(first two letters of functional block)(signal)(state)
Symbol
t
t
NEIVKH
NEIXKH
SPI
R
56. Note that although the specifications
L
memory clock reference (K) goes from the
= 50 Ω
2
1
Min
for outputs. For example,
OV
4
2
DD
/2
Max
Unit
ns
ns
SPI
59

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