mpc8360e Freescale Semiconductor, Inc, mpc8360e Datasheet - Page 65

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mpc8360e

Manufacturer Part Number
mpc8360e
Description
Mpc8360e Powerquicc Ii Pro Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Figure 48
19.3
Figure 49
specifications generally reference the rising edge of the clock, these AC timing diagrams also apply when
the falling edge is the active edge.
Freescale Semiconductor
MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2
Outputs—Internal clock delay
Outputs—External clock delay
Outputs—Internal clock High Impedance
Outputs—External clock High Impedance
Inputs—Internal clock input setup time
Inputs—External clock input setup time
Inputs—Internal clock input Hold time
Inputs—External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal.
2. The symbols used for timing specifications follow the pattern of t
Timings are measured at the pin.
(reference)(state)
t
state (H) until outputs (O) are invalid (X).
HIKHOX
AC Test Load
provides the AC test load.
and
symbolizes the outputs internal timing (HI) for the time t
Figure 50
for inputs and t
Output
Characteristic
represent the AC timing from
Table 63. Synchronous UART AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Z
Figure 48. AC Test Load
0
= 50 Ω
Table 62
serial
(first two letters of functional block)(signal)(state)
Symbol
t
t
t
t
t
t
UAEKHOV
UAEKHOX
t
t
UAIKHOV
UAIKHOX
UAEIVKH
UAEIXKH
HDLC, BISYNC, Transparent, and Synchronous UART
UAIIVKH
UAIIXKH
memory clock reference (K) goes from the high
R
and
L
= 50 Ω
2
Table
63. Note that although the
Min
for outputs. For example,
OV
0
1
0
1
6
8
1
1
DD
1
/2
Max
11.3
14
11
14
Unit
ns
ns
ns
ns
ns
ns
ns
ns
65

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