mpc8313e Freescale Semiconductor, Inc, mpc8313e Datasheet - Page 3

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mpc8313e

Manufacturer Part Number
mpc8313e
Description
Mpc8313e Powerquicc Ii Pro Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1.2
The following interfaces are supported in the MPC8313E.
1.3
The security engine is optimized to handle all the algorithms associated with IPSec, IEEE Std. 802.11i™,
and iSCSI. The security engine contains one crypto-channel, a controller, and a set of crypto execution
units (EUs). The execution units are:
1.4
The MPC8313E DDR1/DDR2 memory controller includes the following features:
1.5
The MPC8313E PCI controller includes the following features:
Freescale Semiconductor
Dual UART, dual I
Data encryption standard execution unit (DEU), supporting DES and 3DES
Advanced encryption standard unit (AESU), supporting AES
Message digest execution unit (MDEU), supporting MD5, SHA1, SHA-224, SHA-256, and
HMAC with any algorithm
One crypto-channel supporting multi-command descriptor chains
Single 16- or 32-bit interface supporting both DDR1 and DDR2 SDRAM
Support for up to 333-MHz
Support for two physical banks (chip selects), each bank independently addressable
64-Mbit to 1-Gbit devices with x8/x16/x32 data ports (no direct x4 support)
Support for one 16-bit device or two 8-bit devices on a 16-bit bus OR one 32-bit device or two
16-bit devices on a 32-bit bus
Support for up to 16 simultaneous open pages
Supports auto refresh
On-the-fly power management using CKE
1.8-/2.5-V SSTL2 compatible I/O
PCI specification revision 2.3 compatible
Single 32-bit data PCI interface operates at up to 66 MHz
PCI 3.3-V compatible (not 5-V compatible)
Support for host and agent modes
On-chip arbitration, supporting three external masters on PCI
Selectable hardware-enforced coherency
DDR Memory Controller
Serial Interfaces
Security Engine
PCI Controller
MPC8313E PowerQUICC
2
C, and an SPI interface
II Pro Processor Hardware Specifications, Rev. 0
Overview
3

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