mpc8306 Freescale Semiconductor, Inc, mpc8306 Datasheet - Page 2

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mpc8306

Manufacturer Part Number
mpc8306
Description
Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Overview
1
The MPC8306 incorporates the e300c3 (MPC603e-based) core built on Power Architecture® technology,
which includes 16 Kbytes of each L1 instruction and data caches, dual integer units, and on-chip memory
management units (MMUs). The MPC8306 also includes two DMA engines and a 16-bit DDR2 memory
controller.
A new communications complex based on QUICC Engine technology forms the heart of the networking
capability of the MPC8306. The QUICC Engine block contains several peripheral controllers and a 32-bit
RISC controller. Protocol support is provided by the main workhorses of the device—the unified
communication controllers (UCCs). A block diagram of the MPC8306 is shown in the following figure.
Each of the five UCCs can support a variety of communication protocols such as 10/100 Mbps MII/RMII
Ethernet, IEEE-1588, HDLC and TDM.
2
2x TDM Ports
2x DUART
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
Timers
2x HDLC
GPIO
RTC
SPI
I2C
Overview
Generators
Baud Rate
QUICC Engine Block
Controller
Interrupt
Single 32-bit RISC CP Serial DMA
1 RMII/MII
Accelerators
Time Slot Assigner
Serial Interface
16 KB Multi-User RAM
48 KB Instruction RAM
2x IEEE 1588
e300c3 Core with Power
I-Cache
2 RMII/MII
16-KB
Figure 1. MPC8306 Block Diagram
Management
FPU
D-Cache
16-KB
Engine
DMA
Host/Device/OTG
USB 2.0 HS
4 FlexCAN
ULPI
Enhanced Local
Bus Controller
eSDHC
Freescale Semiconductor
Controller
DDR2

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