mpc5200cvr400br2 Freescale Semiconductor, Inc, mpc5200cvr400br2 Datasheet - Page 73

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mpc5200cvr400br2

Manufacturer Part Number
mpc5200cvr400br2
Description
Mpc5200b 32-bit Embedded Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
For a board with a COP (common on-chip processor) connector, which accesses the JTAG interface and
which needs to reset the JTAG module, simply wiring JTAG_TRST and PORRESET is not recommended.
To reset the MPC5200B via the COP connector, the HRESET pin of the COP should be connected to the
HRESET pin of the MPC5200B. The circuitry shown in
JTAG_TRST separately, while any other board sources can drive PORRESET.
Freescale Semiconductor
NOTES:
Pin #
BDM
7
6
5
4
3
2
1
1.
2.
3.
4.
See Note
See Note
JTAG_TRST
MPC5200B
JTAG_TDO
JTAG_TCK
With respect to the emulator tool’s perspective:
Input is really an output from the embedded e300 core.
Output is really an input to the core.
From the board under test, power sense for chip power.
HALTED is not available from e300 core.
Input to the e300 core to enable/disable soft-stop condition during breakpoints. MPC5200B
internally ties CORE_QACK to GND in its normal/functional mode (always asserted).
JTAG_TDI
I/O Pin
Table 53. COP/BDM Interface Signals (continued)
(3)
(4)
.
.
MPC5200B Data Sheet, Rev. 1
Connector
halted
VDD
qack
BDM
trst
tdo
tck
tdi
(2)
(4)
(3)
Pull Up/Down
100k Pull-Up
100k Pull-Up
100k Pull-Up
Figure 54
Internal
allows the COP to assert HRESET or
Pull Up/Down
10k Pull-Up
10k Pull-Up
10k Pull-Up
External
System Design Information
I/O
O
O
O
O
I
I
(1)
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