adav400kstz-reel Analog Devices, Inc., adav400kstz-reel Datasheet - Page 6

• Manufacturer Part Number: adav400kstz-reel
• Description: Audio Codec With Embedded Sigmadsp Processor
• Manufacturer: Analog Devices, Inc.

ADAV400
DIGITAL TIMING
Table 2.
Parameter
MASTER CLOCK AND RESET
I
SERIAL PORTS
2
C® PORT
f
t
t
t
f
t
t
Start Condition
Stop Condition
Slave Mode
Master Mode
MCLKI
MCH
MCL
RLPW
SCL
SCLH
SCLL
t
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
SCS
SCH
DS
SCR
SCF
SDR
SDF
SCSH
SBH
SBL
SBF
SLS
SLH
SDS
SDH
SDD
MLD
MDD
MDS
MDH
(SCL Clock Frequency)
(MCLKI Low)
(MCLKI High)
(SCL Low)
(SCL High)
(RESET Low Pulse Width)
(MCLKI Frequency)
(Data Setup Time)
(BCLKx Frequency)
(LRCLKx Setup)
(Setup Time)
(SCL Fall Time)
(SDA Rise Time)
(BCLKx Low)
(SCL Rise Time)
(SDA Fall Time)
(BCLKx High)
(LRCLKx Hold)
(SDINx Setup)
(Hold Time)
(SDINx Hold)
(SDOx Delay)
(LRCLKx Delay)
(SDINx Setup)
(SDOx Delay)
(SDINx Hold)
(Setup Time)
Min
3.024
10
10
20
0.6
1.3
0.6
0.6
100
0.6
40
40
64 × f
10
10
10
10
10
10
S
Max
24.576
400
300
300
300
300
40
5
40
Rev. A | Page 6 of 36
Unit
MHz
ns
ns
ns
kHz
μs
μs
μs
μs
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Comments
Relevant for repeated start condition
The first clock is generated after this period
To BCLK rising edge
From BCLK rising edge
To BCLK rising edge
From BCLK rising edge
From BCLK falling edge
From BCLK falling edge
From BCLK falling edge
From BCLK rising edge
From BCLK rising edge