adav400kstz-reel Analog Devices, Inc., adav400kstz-reel Datasheet - Page 9

• Manufacturer Part Number: adav400kstz-reel
• Description: Audio Codec With Embedded Sigmadsp Processor
• Manufacturer: Analog Devices, Inc.

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5 to 12,
65, 66
13, 20,
28, 32,
41, 48
14, 21,
31, 40,
47
15
16
17
18
19
22 to 25
26
27
29
30
Mnemonic
FILTA
VREF
AGND
AVDD1
NC
DGND
DVDD
AD0
SDA
SCL
TEST0
TEST1
SDIN [0:3]
LRCLK0
BCLK0
ODVDD
VDRIVE
NC = NO CONNECT
I/O
O
I
I/O
I
I
I
I
AVDD1
TEST0
TEST1
AGND
DGND
DGND
Description
ADC Filter Decoupling Node for the ADC. Decouple this pin to AGND (Pin 3).
Voltage Reference. This pin is driven by an internal 1.5 V reference voltage. Decouple this pin to AGND (Pin 3).
ADC Ground. Connect this pin to the analog ground plane.
Analog Power Supply Pin for the ADC. Connect this pin to 3.3 V and decouple to AGND (Pin 3).
Not Connected Internally.
Digital Ground. Connect this pin to the digital ground plane.
Digital Power Supply Pins. Connect these pins to 1.8 V, either directly or by using the on-chip regulator.
Decouple to DGND.
I
Address 0x2A (write) and Address 0x2B (read).
Serial Data Input/Output for the I
Serial Clock for the I
Test Pin. Connect to ODVDD.
Test Pin. Connect to ODVDD.
Serial Data Inputs. BCLK1 and LRCLK1 are used as the timing signals for SDIN0 to SDIN3.
Left/Right Clock for Sample Rate Converter (SRC). This input frame synchronization signal is associated
with SDIN0 to SDIN3 when one of these input channels is redirected to the SRC.
Bit Clock for Sample Rate Converter (SRC). This input clock is associated with SDIN0 to SDIN3 when one of
these input channels is redirected to the SRC.
Digital Interface Supply (3.3 V) Pin. Connect this pin to a 3.3 V digital supply. Decouple to DGND.
Drive for External PNP Transistor. This is used with the on-chip 1.8 V regulator circuit.
DVDD
FILTA
VREF
2
C Address Select. Tie to ODVDD for Address 0x28 (write) and Address 0x29 (read) or to DGND for
AD0
SDA
SCL
NC
NC
NC
NC
NC
NC
NC
NC
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
PIN 1
2
C Control Port.
Figure 5. Pin Configuration
Rev. A | Page 9 of 36
(Not to Scale)
ADAV400
2
TOP VIEW
C Control Port.
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
VOUT3
VOUT2
VOUT1
AUXR1
AUXL1
AVDD3
HPOUTR
HPOUTL
AGND
AGND
PLL_LF
AVDD2
DGND
DVDD
RESET
NC
NC
SDO3
SDO2
DGND
ADAV400