at83c5122 ATMEL Corporation, at83c5122 Datasheet - Page 52
at83c5122
Manufacturer Part Number
at83c5122
Description
At83c5123 C51 Microcontroller With Usb And Smart Card Reader Interfaces
Manufacturer
ATMEL Corporation
Datasheet
1.AT83C5122.pdf
(213 pages)
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52
AT8xC5122/23
Table 27. Clock Configuration Register 1 - CKCON1 (S:AFh) only for AT8xC5122
Reset Value = XXXX XXX0b
Table 28. PLL Control Register - PLLCON (S:A3h)
Reset Value = 0000 0000b
Table 29. PLL Divider Register - PLLDIV (S:A4h)
Reset Value = 0000 0000b
Bit Number Bit Mnemonic Description
Bit Number Bit Mnemonic Description
Bit Number Bit Mnemonic Description
7 - 4
7 - 3
7 - 4
3 - 0
R3
7
7
7
-
3
0
-
2
1
0
PLOCK
R2
PLLEN
6
6
EXT48
6
SPIX2
-
-
R3:0
N3:0
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
SPI clock
This control bit is validated when the CPU clock X2 is set. When X2 is low,
this bit has no effect.
Cleared to bypass the PR1 prescaler.
Set to select the PR1 output for this peripheral.
Reserved
The value read from these bits is always 0. Do not set this bits.
External 48 MHz Enable Bit
Set this bit to select XTAL1 as USB clock.
Clear this bit to select PLL as USB clock.
SCIB clock is controlled by EXT48 bit and XTSCS bit.
PLL Enable bit
Set to enable the PLL.
Clear to disable the PLL.
PLL Lock Indicator
Set by hardware when PLL is locked
Clear by hardware when PLL is unlocked
PLL R Divider Bits
PLL N Divider Bits
R1
5
5
5
-
-
R0
4
4
4
-
-
N3
3
3
3
-
-
EXT48
N2
2
2
2
-
PLLEN
N1
1
1
1
-
4202E–SCR–06/06
PLOCK
SPIX2
N0
0
0
0
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