isp1562 NXP Semiconductors, isp1562 Datasheet - Page 10

• Manufacturer Part Number: isp1562
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
7. Functional description
ISP1562_2
Product data sheet
7.1 OHCI Host Controller
7.2 EHCI Host Controller
7.3 Dynamic port-routing logic
7.4 Hi-Speed USB analog transceivers
7.5 Power management
7.6 Phase-Locked Loop (PLL)
An OHCI Host Controller per port transfers data to devices at the Original USB defined bit
rate of 12 Mbit/s or 1.5 Mbit/s.
The EHCI Host Controller transfers data to a Hi-Speed USB compliant device at the
Hi-Speed USB defined bit rate of 480 Mbit/s. When the EHCI Host Controller has the
ownership of a port, OHCI Host Controllers are not allowed to modify the port register. All
additional port bit definitions required for the enhanced Host Controller are not visible to
the OHCI Host Controller.
The port-routing feature allows sharing of the same physical downstream ports between
the Original USB Host Controller and the Hi-Speed USB Host Controller. This requirement
of Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0
provides ports that are multiplexed with the ports of the OHCI.
The EHCI is responsible for the port-routing switching mechanism. Two register bits are
used for ownership switching. During power-on and system reset, the default ownership of
all downstream ports is the OHCI. The enhanced Host Controller Driver (HCD) controls
the ownership during normal functionality.
The Hi-Speed USB analog transceivers directly interface to the USB cables through
integrated termination resistors. These transceivers can transmit and receive serial data
at all data rates: high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed
(1.5 Mbit/s).
The ISP1562 provides an advanced power management capability interface that is
compliant with PCI Bus Power Management Interface Specification Rev. 1.1 . Power is
controlled and managed by the interaction between drivers and PCI registers.
For a detailed description on power management, see
A 12 MHz-to-30 MHz and 48 MHz clock multiplier PLL is integrated on-chip. This allows
the use of a low-cost 12 MHz crystal, which also minimizes EMI. No external components
are required for the PLL to operate.
Rev. 02 — 1 March 2007
Section
HS USB PCI Host Controller
10.
© NXP B.V. 2007. All rights reserved.
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