isp1562 NXP Semiconductors, isp1562 Datasheet - Page 29

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isp1562

Manufacturer Part Number
isp1562
Description
Hi-speed Universal Serial Bus Pci Host Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 41.
Address: Value read from address 34h + 7h
Legend: * reset value
ISP1562_2
Product data sheet
Bit
7 to 0
DATA[7:0]
Symbol
DATA - Data register bit description
8.2.3.6 Data register
Access
R
Table 40.
The Data register is an optional, 1-byte register that provides a mechanism for the
function to report state dependent operating data, such as power consumed or heat
dissipated.
Originating device’s
bridge PM state
D2
D3
D3
hot
cold
Value
00h*
PCI bus power and clock control
Table 41
Description
DATA: This register is used to report the state dependent data requested by the
D_S field of the PMCSR register. The value of this register is scaled by the value
reported by the DS field of the PMCSR register.
shows the bit description of the register.
Secondary bus
PM state
B2
B2, B3
B3
Rev. 02 — 1 March 2007
Resultant actions by bridge (either direct or
indirect)
clock stopped on secondary bus
clock stopped and PCI V
bus (B3 only); for definition of B2_B3#, see
none
…continued
HS USB PCI Host Controller
CC
removed from secondary
© NXP B.V. 2007. All rights reserved.
ISP1562
Table
29 of 93
39.

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