isp1582 NXP Semiconductors, isp1582 Datasheet - Page 9

• Manufacturer Part Number: isp1582
• Description: Hi-speed Universal Serial Bus Peripheral Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1582_6
Product data sheet
7.6.1 NXP Parallel Interface Engine (PIE)
7.6.2 Peripheral circuit
7.2 Hi-Speed USB transceiver
7.3 MMU and integrated RAM
7.4 Microcontroller interface and microcontroller handler
7.5 OTG SRP module
7.6 NXP high-speed transceiver
The analog transceiver directly interfaces to the USB cable through integrated termination
resistors. The high-speed transceiver requires an external resistor (12.0 k
between pin RREF and ground to ensure an accurate current mirror that generates the
Hi-Speed USB current drive. A full-speed transceiver is integrated as well. This makes the
ISP1582 compliant to Hi-Speed USB and Original USB, supporting both the high-speed
and full-speed physical layers. After automatic speed detection, the NXP Serial Interface
Engine (SIE) sets the transceiver to use either high-speed or full-speed signaling.
The Memory Management Unit (MMU) manages the access to the integrated RAM that is
shared by the USB, microcontroller handler and DMA handler. Data from the USB bus is
stored in the integrated RAM, which is cleared only when the microcontroller has read the
corresponding endpoint, or the DMA controller has written all data from the RAM of the
corresponding endpoint to the DMA bus. The OUT endpoint buffer can also be forcibly
cleared by setting bit CLBUF in the Control Function register. A total of 8 kB RAM is
available for buffering.
The microcontroller handler allows the external microcontroller or microprocessor to
access the register set in the NXP SIE, as well as the DMA handler. The initialization of
the DMA configuration is done through the microcontroller handler.
The OTG supplement defines a Session Request Protocol (SRP), which allows a B-device
to request the A-device to turn on V
A-device, which may be battery-powered, to conserve power by turning off V
there is no bus activity while still providing a means for the B-device to initiate bus activity.
Any A-device, including a PC or laptop, can respond to SRP. Any B-device, including a
standard USB peripheral, can initiate SRP.
The ISP1582 is a device that can initiate SRP.
In the High-Speed (HS) transceiver, the NXP PIE interface uses a 16-bit parallel
bidirectional data interface. The functions of the HS module also include bit-stuffing or
de-stuffing and Non-Return-to-Zero Inverted (NRZI) encoding or decoding logic.
To maintain a constant current driver for HS transmit circuits and to bias other analog
circuits, an internal band gap reference circuit and an RREF resistor form the reference
current. This circuit requires an external precision resistor (12.0 k
the analog ground.
Rev. 06 — 20 September 2007
BUS
and start a session. This protocol allows the
Hi-Speed USB Peripheral Controller
1 %) connected to
© NXP B.V. 2007. All rights reserved.
ISP1582
BUS
1 %)
when
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