cp2200 Silicon Laboratories, cp2200 Datasheet - Page 49

• Manufacturer Part Number: cp2200
• Description: Single-chip Ethernet Controller
• Manufacturer: Silicon Laboratories

11.5. Transmit Status and Control Registers
The CP2200 transmit interface is controlled and managed through the registers in Table 14. After each packet is
transmitted, information about the last transmitted packet can be obtained from the 52-bit transmit status vector
accessible through the TXSTA0 — TXSTA6 registers. The transmit status vector is described in Table 15.
TXCN
TXBUSY
TXPAUSEH
TXPAUSEL
TXSTARTH
TXSTARTL
TXENDH
TXENDL
TXAUTOWR Transmit Data AutoWrite
TXSTA6
TXSTA5
TXSTA4
TXSTA3
TXSTA2
TXSTA1
TXSTA0
Register
Transmit Control
Transmit Busy Indicator
Transmit Pause High and Low Bytes
Transmit Data Starting Address High
and Low Bytes
Transmit Data Ending Address High
and Low Bytes
Transmit Status Vector
Table 14. Transmit Status and Control Register Summary
Long Name
Rev. 1.0
Address
0x5A
0x5C
0x5D
0x5E
0x53
0x55
0x56
0x59
0x57
0x58
0x03
0x5F
0x60
0x61
0x62
0x54
Contains the transmit configuration option over-
ride bits and the TXGO bit used to start packet
transmission.
Read-only register returning 0x01 when transmit
interface is currently transmitting a packet and
0x00 when transmit interface is not transmitting.
16-bit pause value used for PAUSE packet
transmission. The pause value is in units of 512
bit times (51.2
Starting address of outgoing packet in the trans-
mit buffer. Packets added to the transmit buffer
must start at 0x0000.
Address of last byte added to the transmit
buffer. This register is managed by hardware.
Writes to this register add a byte to the transmit
buffer, set TXEND to the address of the written
byte, and increment TXSTART.
52-bit transmit status vector containing informa-
tion about the last transmitted packet including
collision count, successful transmission, total
bytes transmitted, etc.
μ
s).
Description
CP2200/1
49