lan9218i Standard Microsystems Corp., lan9218i Datasheet - Page 54

• Manufacturer Part Number: lan9218i
• Description: Lan9218i High-performance Single-chip 10/100 Ethernet Controller With Hp Auto-mdix And Industrial Temperature Support
• Manufacturer: Standard Microsystems Corp.

Revision 2.3 (08-06-08)
3.12.2
3.12.3
29:16
BITS
31
30
15
14
13
12
Reserved. This bit is reserved. Reads 0.
Filtering Fail. When set, this bit indicates that the associated frame failed the address recognizing
filtering.
Packet Length. The size, in bytes, of the corresponding received frame.
Error Status (ES). When set this bit indicates that the MIL has reported an error. This bit is the
Internal logical “or” of bits 11,7,6 and 1.
Reserved. These bits are reserved. Reads 0.
Broadcast Frame. When set, this bit indicates that the received frame has a Broadcast address.
Length Error (LE). When set, this bit indicates that the actual length does not match with the
length/type field of the received frame.
RX Packet Format
The RX status words can be read from the RX status FIFO port, while the RX data packets can be
read from the RX data FIFO. RX data packets are formatted in a specific manner before the host can
read them as shown in
status word from the RX status FIFO, to ascertain the data size and any error conditions.
RX Status Format
Host Read
Order
Last
2nd
1st
Figure
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Figure 3.17 RX Packet Format
3.17. It is assumed that the host has previously read the associated
31
ofs + First Data DWORD
DATASHEET
Optional offset DWORD0
Optional offset DWORDn
Optional Pad DWORD0
Optional Pad DWORDn
Last Data DWORD
DESCRIPTION
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SMSC LAN9218i
Datasheet