lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 211

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lpc47s457-ns

Manufacturer Part Number
lpc47s457-ns
Description
Advanced I/o With X-bus Interface
Manufacturer
Standard Microsystems Corp.
Datasheet

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Part Number:
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Note 1: To properly share and IRQ,
SMSC LPC47S45x
Serial Port 1
Mode Register
Default = 0x00
on VCC POR ,
VTR POR and
PCI RESET
Serial Port 2
Mode Register
Default = 0x00
on VCC POR,
VTR POR and
PCI RESET
1. Configure UART1 (or UART2) to use the desired IRQ pin.
2. Configure UART2 (or UART1) to use No IRQ selected.
3. Set the share IRQ bit.
Note: If both UARTs are configured to use different IRQs and the share IRQ bit is set, then both of the UART
IRQs will assert when either UART generates an interrupt.
NAME
NAME
Table 90 − Serial Port 2, Logical Device 5 [Logical Device Number = 0x05]
Table 89 − Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]
REG INDEX
REG INDEX
0xF0 R/W
(R/W)
0xF0
UART Interrupt Operation Table
Bit[0] MIDI Mode
= 0
= 1
Bit[1] High Speed
= 0
= 1
Bit[6:2] Reserved, set to zero
Bit[7]: Share IRQ
=0 UARTS use different IRQs
=1 UARTS share a common IRQ
See Note 1 below.
Bit[0] MIDI Mode
= 0
= 1
Bit[1] High Speed
= 0
= 1
Bit[7:2] Reserved, set to zero
DATASHEET
Page 211 of 259
MIDI support disabled (default)
MIDI support enabled
High Speed Disabled(default)
High Speed Enabled
MIDI support disabled (default)
MIDI support enabled
High Speed disabled(default)
High Speed enabled
DEFINITION
DEFINITION
Rev. 08-10-09
STATE
STATE
C
C

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