lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 66

• Manufacturer Part Number: lpc47s457-ns
• Description: Advanced I/o With X-bus Interface
• Manufacturer: Standard Microsystems Corp.

Line Control Register (LCR)
Address Offset = 3H, DLAB = 0, READ/WRITE
This register contains the format information of the serial line. The bit definitions are:
Bits 0 and 1
These two bits specify the number of bits in each transmitted or received serial character. The encoding of bits 0 and 1
is as follows:
The Start, Stop and Parity bits are not included in the word length.
Bit 2
This bit specifies the number of stop bits in each transmitted or received serial character. The following table
summarizes the information.
SMSC DS – LPC47S45x
MODE
ONLY
BIT 3
FIFO
0
1
0
0
BIT 2
IDENTIFICATION
1
1
0
0
INTERRUPT
REGISTER
Start
BIT 1
0
0
1
0
BIT 0
LSB Data 5-8 bits MSB
0
0
0
0
BIT 1
0
0
1
1
PRIORITY
Second
Second
Third
Fourth
LEVEL
FIGURE 1 − SERIAL DATA
DATASHEET
BIT 0
0
1
0
1
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INTERRUPT SET AND RESET FUNCTIONS
Received Data
Available
Character
Timeout
Indication
Transmitter
Holding
Register Empty
MODEM
Status
INTERRUPT
WORD LENGTH
TYPE
5 Bits
6 Bits
7 Bits
8 Bits
Parity
Receiver Data
Available
No Characters
Have Been
Removed From or
Input to the RCVR
FIFO during the
last 4 Char times
and there is at
least 1 char in it
during this time
Transmitter
Holding Register
Empty
Clear to Send or
Data Set Ready or
Ring Indicator or
Data Carrier
Detect
INTERRUPT
SOURCE
Stop
Read Receiver
Buffer or the FIFO
drops below the
trigger level.
Reading the
Receiver Buffer
Register
Reading the IIR
Register (if Source
of Interrupt) or
Writing the
Transmitter
Holding Register
Reading the
MODEM Status
Register
INTERRUPT
CONTROL
RESET
Rev. 04-30-07