tle8261-2e Infineon Technologies Corporation, tle8261-2e Datasheet - Page 65

• Manufacturer Part Number: tle8261-2e
• Description: Universal System Basis Chip Hermes
• Manufacturer: Infineon Technologies Corporation

14.5.2.2
Table 14
the INT pin. By default, all interrupt sources are enabled. The microcontroller can decide to inhibit a specific
interrupt source.
Table 14
CS
Configuration select 000 (Wake register interrupt)
Data Sheet
000
Bit Name
WK CAN
WK 1 WK pin
WK 0 WK pin
Cyclic WK
INT
lists all interrupts the SBC can generates. The microcontroller should read the correct register to release
Interrupt Register Encoder
Interrupt Register encoder
Default
Value
(INPUT)
1
11
n.a
n.a
Default
Value
(OUT)
0
00
0
0
1)
Data Input
Interrupt enabled (1) disabled
(0) for wake event on CAN
Interrupt enabled (1) disabled
(0) for wake pin event.
00 No interrupt
10 Interrupt for a LOW to HIGH
transition on WK
01 Interrupt for HIGH to LOW
transition on WK
11 Interrupt for both HIGH to
LOW and LOW to HIGH on WK
n.a
n.a
65
Cyclic WK (1)
Indicates that there is a status
Data Output
Wake on CAN (1)
Wake on WK pin
00 No wake
10 Interrupt for a LOW to HIGH
transition on WK
01 Interrupt for HIGH to LOW
transition on WK
11 Interrupt for both HIGH to
LOW and LOW to HIGH on WK
bit or uncleared event in
configuration select 001 and/or
010. If set read the two register
Serial Peripheral Interface
Rev. 1.0, 2009-05-26
TLE8261-2E