tle8261-2e Infineon Technologies Corporation, tle8261-2e Datasheet - Page 71

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tle8261-2e

Manufacturer Part Number
tle8261-2e
Description
Universal System Basis Chip Hermes
Manufacturer
Infineon Technologies Corporation
Datasheet

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14.6
14.6.1
Since the SPI output data is sent when the SBC is receiving data, the output data are dependent of the previous
SPI command, if no Read Only command is used. Under some conditions there is no “previous command”.
Table 22
depending on the mode where the SBC was before receiving the first SPI command.
.
Table 22
Previous SBC mode
1) This does not clear the bits. It will be reset when the microcontroller requests the read out
Data Sheet
Sleep mode
Fail-Safe mode
Restart mode when failure and config 1 / 3
Restart mode when microcontroller has sent
to Restart mode
SBC Init mode
gives the first SPI output data that is sent to the microcontroller when entering SBC Normal Mode,
SPI Output Data
First SPI output data
First SPI output data frame
Mode selection bits (MS2...0) Configuration select (CS 2..0)
Sleep mode
Fail-Safe mode
Restart mode
Restart mode
Init mode
71
Wake Register interrupt
Limp Home register
Limp Home register
SBC Configuration Register
SBC Configuration Register
Serial Peripheral Interface
Rev. 1.0, 2009-05-26
TLE8261-2E
1)
1)
1)

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