hip9010 Intersil Corporation, hip9010 Datasheet - Page 8

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hip9010

Manufacturer Part Number
hip9010
Description
Engine Knock Signal Processor
Manufacturer
Intersil Corporation
Datasheet

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NOTE:
4. Integrator Time Constant: Defines the Integration Time
5. Test/Channel Select/Channel Attenuate Control: This word
3. All Test function blocks have their outputs buffered by the differential
PIN 14
TEST
- If CS is “0” channel “0” is selected. If CS is “1” channel “1”
- If C
- During the test mode (TEST input is a low level), if T
- Combinations of T
TABLE 1. SHOWING PROGRAMMING IN THE TEST MODE
Constant for the system. The first 3 bits are used for the
address and the last 5 bits for the value. 110TTTTT
Example: 11000011 would be the integrator time
constant (110 on for the first 3 bits) and an integration
constant of 55 s (bit value of 3 in Table 2).
serves several purposes. By looking at the structure,
111T
and the last 5 bits are used for the value. The options are:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
to single ended converter. Their outputs are available at the
INTOUT pin 4 of the chip. In the case of the antialias filter test
function, the output is taken directly to the INTOUT pin 4 of the chip.
is selected.
“1” attenuation applies to the reference filter.
all sections get their input from the output of the
antialiasing filter input. This input can come from either the
output of channel “0” amplifier or channel “1” output
depending upon the state of the C
amplifiers are powered down. If T
test mode the chip is configured in its normal operating
state, getting inputs to all sections from previous sections.
different analog parts of the circuit. Table 1 shows these
combinations. All blocks except for the antialiasing filter are
sampled via the differential to single ended converter in the
test mode.
A
A
T
is “0” attenuation applies to the knock filter. If C
B
T
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
x
T
A
C
C
S
C
T
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A
x
B
, the first 3 bits are used for the address,
A
, T
B
T
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
x
and T
C
4-8
C
C
HS
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
are used to test the
A
S
is set to “1” during the
bit. If T
Knock Rectifier
Reference
Knock Filter
Reference Filter
Antialias Filter(1)
Antialias Filter(1)
Integrator
Integrator
Knock Rectifier
Reference
Knock Filter
Reference Filter
Antialias Filter(1)
Antialias Filter(1)
Integrator
Integrator
Integrator
ANALOG OUTPUT
A
is “0” the input
FROM:
A
A
is “0”
is
HIP9010
FIGURE 4B. MISO OUTPUT OF SPI DATA BUS IS AN OPEN
FIGURE 4C. TEST PMOS TRANSISTOR HAS EQUIVALENT
FIGURE 4D. S0FB, S1FB AND INOUT EQUIVALENT OUTPUT
S0IN
S1IN
FIGURE 4A. S0IN AND S1IN INPUT CIRCUIT
DRAIN TRANSISTOR
CURRENT PULLUP CAPABILITY OF A 50k TO
200k RESISTOR
CIRCUITS
TO LOGIC
FIGURE 4. INTERFACE CIRCUITS
V
TO NEXT STAGE
DD
V
S0FB S1FB
DD
INOUT
50 A
MISO
11
V
DD
TEST
14
HALF OF
DIFFERENTIAL
AMPLIFIER

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