aduc7033bstz-8l-rl Analog Devices, Inc., aduc7033bstz-8l-rl Datasheet - Page 120

• Manufacturer Part Number: aduc7033bstz-8l-rl
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

ADuC7033
LIN Hardware Synchronization Status Register
Name:
Address:
Default Value:
Access:
Function:
Table 93. LHSSTA MMR Bit Designations
Bit
31 to 7
6
5
4
3
2
1
0
LHSSTA
0xFFFF0780
0x00
Read only
The LHS status register is a 32-bit register whose bits reflect the current operating status of the ADuC7033 LIN
interface.
Description
Reserved. These read-only bits are reserved for future use.
Rising Edge Detected (BSD Mode Only).
LHS Reset Complete Flag.
Break Field Error.
LHS Compare Interrupt.
Stop Condition Interrupt.
Start Condition Interrupt.
Break Timer Compare Interrupt.
Set to 1 by hardware to indicate a rising edge has been detected on the BSD bus.
Cleared to 0, after user code reads the LHSSTA MMR.
Set to 1 by hardware to indicate a LHS reset command has completed successfully.
Cleared to 0, after user code reads the LHSSTA MMR.
Set to 1 by hardware and generates an LHS interrupt (IRQEN[7]) when the 12-bit break timer (LHSVAL1) register
overflows to indicate the LIN bus has stayed low too long, thus indicating a possible LIN bus error.
Cleared to 0, after user code reads the LHSSTA MMR.
Set to 1 by hardware when the value in LHSVAL0 (LIN synchronization bit timer) = the value in the LHSCMP register.
Cleared to 0, after user code reads the LHSSTA MMR.
Set to 1 by hardware when a stop condition is detected.
Cleared to 0, after user code reads LHSSTA MMR.
Set to 1 by hardware when a start condition is detected.
Cleared to 0, after user code reads LHSSTA MMR.
Set to 1 by hardware when a valid LIN break condition is detected. A LIN break condition is generated when the LIN
break timer value reaches the break timer compare value (see LHSVAL1 in the LIN Hardware Break Timer1 Register
section for more information).
Cleared to 0 after user code reads the LHSSTA MMR.
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