aduc7033bstz-8l-rl Analog Devices, Inc., aduc7033bstz-8l-rl Datasheet - Page 88

• Manufacturer Part Number: aduc7033bstz-8l-rl
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

ADuC7033
GPIO Port0 Control Register
Name:
Address:
Default Value:
Access:
Function:
Table 59. GP0CON MMR Bit Designations
Bit
31 to 29
28
27 to 25
24
23 to 21
20
19 to 17
16
15 to 13
12
11 to 9
8
7 to 5
4
3 to 1
0
GP0CON
0xFFFF0D00
0x11100000
Read/write
The 32-bit MMR selects the pin function for each Port0 pin.
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Reserved. This bit is reserved and should be written as 1 by user code.
Reserved. These bits are reserved and should be written as 0 by user code.
Internal P0.6 Enable Bit. This bit must be set to 1 by user software to enable the high voltage serial interface before
using the HVCON and HVDAT registered high voltage interface.
Reserved. These bits are reserved and should be written as 0 by user code.
Internal P0.5 Enable Bit. This bit must be set to 1 by user software to enable the high voltage serial interface before
using the HVCON and HVDAT registered high voltage interface.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_4 Function Select Bit.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_3 Function Select Bit.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_2 Function Select Bit.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_1 Function Select Bit.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_0 Function Select Bit.
Cleared by user code to 0 to configure the GPIO_4 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_4 pin as ECLK enabling a 2.56 MHz clock output on this pin.
Cleared by user code to 0 to configure the GPIO_3 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_3 pin as MOSI, master output, and slave input data for the SPI port.
Cleared to 0 by user code to configure the GPIO_2 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_2 pin as MISO, master input, and slave output data for the SPI port.
Cleared to 0 by user code to configure the GPIO_1 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_1 pin as SCLK, serial clock I/O for the SPI port.
Cleared to 0 by user code to configure the GPIO_0 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_0 pin as SS, slave select I/O for the SPI port.
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