pi2eqx5864 Pericom Semiconductor Corporation, pi2eqx5864 Datasheet - Page 14

• Manufacturer Part Number: pi2eqx5864
• Description: 5.0gbps 4-lane Pcie Gen2 Redriver With I2c Control
• Manufacturer: Pericom Semiconductor Corporation

SDA and SCL I/O for I2C-bus (V
Characteristics of the SDA and SCL bus lines for F/S-mode I2C-bus devices
Notes:
1. All values referred to V
2. A device must initially provide a hold time of at least 300 ns for the SDA signal (referred to the V
region of the falling edge of SCL.
Symbol
V
V
V
V
Symbol
t
t
t
IH
IL
OL
hys
t
t
HD;DAT
HD;STA
SU;DAT
SU;STO
SU;STA
t
t
t
f
HIGH
LOW
BUF
SCL
C
t
t
r
f
b
07-0277
SCL clock frequency
Hold time (repeated) START condition. After
this period, the fi rst clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data set-up time
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Buss free time between a STOP and STOP
condition
Capacitive load for each bus line
Parameter
DC input logic high
DC input logic low
DC output logic low
Hysteresis of Schmitt trigger input
IHmin
and V
Parameter
ILmax
DD
= 1.2 ± 0.05v, T
levels.
A
= 0 to 70°C)
Conditions
Conditions
I
OL
14
= 3mA
5.0Gbps 4-Lane PCI Express GenII Re-Driver
with Equalization, Emphasis and I
1.1
-0.3
0.2
(1)
Min.
Min.
250
4.0
4.7
4.0
4.7
5.0
4.0
4.7
0
–
–
IHmin
Typ.
of the SCL signal) to bridge the undefi ned
Typ.
3.6
0.7
0.4
Max.
Max.
100
100
300
400
–
–
–
–
–
–
–
–
PS8934A
PI2EQX5864
2
V
V
V
V
C Control
Units
Unit
kHz
pF
μs
μs
μs
μs
μs
μs
μs
ns
ns
ns
01/21/08