pi2eqx5864 Pericom Semiconductor Corporation, pi2eqx5864 Datasheet - Page 8

• Manufacturer Part Number: pi2eqx5864
• Description: 5.0gbps 4-lane Pcie Gen2 Redriver With I2c Control
• Manufacturer: Pericom Semiconductor Corporation

Byte 2 - Loopback and Emphasis Control Register (LBEC)
LB_xyxy#=0=loopback mode, LB_xyxy#=1=normal mode, DE_x=0=pre-emphasis, DE_x=1=de-emphasis
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
Individual control for each lane is provided for the loopback function via this register.
BYTE 3 - Channel Input Disable (INDIS)
INDIS_xy=0=enable input, INDIS_xy=1=disable input
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The Channel Input Disable register, provides control over the input buffer of each channel independently. When and INDIS_xy bit is
logic 1, then the input buffer is switched off and the input termination is high impedance. This feature can be used for PCB testing,
and when only one input is used during Loopback as a demux function. When INDIS_xy is at a logic 0 state then the input buffer is
enabled (normal operating mode).
BYTE 4 - Channel Output Disable (OUTDIS)
ODIS_xy=0=enable output, ODIS_xy=1=disable output
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The Channel Output Disable register, allows control over the output buffer of each channel independently. When and OUTDIS_xy
bit is logic 1, then the output buffer is switched off and the termination is high impedance. This feature can be used for PCB testing,
and when only one output is used during Loopback as a mux function. When INDIS_xy is at a logic 0 state then the input buffer is
enabled (normal operating mode).
Power-on
Power-on
Power-on
Name
Name
Name
Type
State
Type
State
Type
State
Bit
Bit
Bit
07-0277
INDIS_A0
LB_A0B0#
ODIS_A0
R/W
R/W
LB#
R/W
7
0
7
7
0
INDIS_B0
LB_A1B1#
ODIS_B0
R/W
6
0
R/W
R/W
LB#
6
6
0
INDIS_A1
R/W
ODIS_A1
LB_A2B2#
5
0
R/W
R/W
LB#
5
0
5
INDIS_B1
8
R/W
ODIS_B1
4
0
LB_A3B3#
R/W
4
0
R/W
LB#
5.0Gbps 4-Lane PCI Express GenII Re-Driver
with Equalization, Emphasis and I
4
INDIS_A2
R/W
ODIS_A2
3
0
R/W
DE_A
3
0
R/W
3
1
INDIS_B2
R/W
ODIS_B2
2
0
DE_B
R/W
R/W
2
0
2
1
INDIS_A3
ODIS_
R/W
R/W
rsvd
A3
PS8934A
0
1
1
0
X
R
1
PI2EQX5864
2
C Control
ODIS_
INDIS_
R/W
rsvd
B3
R/W
0
0
B3
X
R
0
0
0
01/21/08