ncn6804 ON Semiconductor, ncn6804 Datasheet - Page 15

• Manufacturer Part Number: ncn6804
• Description: Dual Smart Card Interface Ic With Spi Programming Interface
• Manufacturer: ON Semiconductor

Powerdown Sequence
sequence, according to the ISO7816-3 specifications. When
a power down sequence is enabled the communication
session terminates immediately. The sequence is launched
under a micro-controller decision, when the card is
extracted, or when the CRD_VCCA/B voltage is overloaded
as described by the ISO/CEI 7816-3 sequence depicted here
after (see Figure 8):
³ CRD_ RST is forced to Low
³ CRD_CLK is forced to Low, unless it is already in this
state
³ CRD_C4 & CRD_C8 are forced to Low
³ Then CRD_IO is forced to Low
³ Finally the CRD_VCC supply is powered down
The NCN6804 provides an automatic Power Down
Figure 6. Figure 7: Start Up Sequence with ATR.
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NCN6804
15
insertion or extraction, the physical power-down sequence
will be activated 50 ms (typical) after the card has been
extracted. Of course, such a delay does not exist when the
micro-controller intentionally launches the power down.
Data I/O Level Shifter
that might exist between the micro-controller and the smart
card. A pulsed accelerator circuit provides the fast positive
going transient according to the ISO7816-3 specifications.
The basic I/O level shifter is depicted Figure 8.
Since the internal digital filter is activated for any card
The level shifter accommodates the voltage difference
CRD_VCC
CRD_RST
CRD_CLK
CRD_I/O
CRD_C4
(Typical Delay Between Each Signal is 500 ns)
Figure 7. Typical Power Down Sequence