ncn6804 ON Semiconductor, ncn6804 Datasheet - Page 21
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ncn6804
Manufacturer Part Number
ncn6804
Description
Dual Smart Card Interface Ic With Spi Programming Interface
Manufacturer
ON Semiconductor
Datasheet
1.NCN6804.pdf
(25 pages)
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the card is extracted from the socket, the active pull down Q7
rapidly discharges the output reservoir capacitor, making
sure the output voltage is below 0.4 V when the card slides
across the ISO contacts.
NCN6804 characterization, the best comprise, at time of
printing this document, is to use two 4.7 mF/10 V/
ceramic/X7R capacitors in parallel to achieve the
CRD_VCC filtering. The ESR will not extend 50 mW over
the temperature range and the combination of standard parts
provides an acceptable –20% to +20% tolerance, together
with a low cost. Obviously, the capacitor must be SMD type
to achieve the extremely low ESR and ESL necessary for
this application. Figure 18 illustrates the CRD_VCC ripple
observed in the NCN6804 demoboard depending upon the
type of capacitor used to filter the output voltage.
Figure 18. Typical CRD_VCC Ripple Voltage (5 V, 3 V
and 1.8 V) – cms Capacitor C
When the CRD_VCC is programmed to zero volt, or when
Based on the experiments carried out during the
CRD_VCC
Q1/Q4
Q2/Q3
Q5/Q6
IL
t
on
CRD_VCC Voltage Regulated
t
off
Charge CRD_VCC
16 V
OUT
Figure 17. Theoretical DC/DC Operating Waveforms
= 10 mF, 1210, X7R,
http://onsemi.com
(Time is Not to Scale)
CRD_VCC Charged
NCN6804
21
current as depicted Figure 19 and the magnetic core must
sustain this level of current without damage. In particular,
the ferrite material shall not be saturated to avoid
uncontrolled current spike during the charge up cycle.
Moreover, since the DC/DC efficiency depends upon the
losses developed into the active and passive components,
selecting a low ESR inductor is preferred to reduce these
losses to a minimum.
is recommended the interface limits the CRD_VCC output
current to 200 mA maximum, under short circuit conditions.
The NCN6804 supports such a parameter, the limit being
depending upon the input and output voltages as depicted
Figure 20.
I
peak
During the operation, the inductor is subject to high peak
According to the ISO7816-3 and EMV specifications, it
Figure 19. Typical Inductor Current
V
ripple
Next CRD_VCC Charge