psf21911 ETC-unknow, psf21911 Datasheet - Page 115

• Manufacturer Part Number: psf21911
• Description: Isdn Echocancellation Circuit Terminal Applications Iec-q
• Manufacturer: ETC-unknow

PSB 21911
PSF 21911
Register Description
4.1.1
Monitor-Channel Interrupt Logic
The Monitor Data Receive (MDR) and the Monitor End of Reception (MER) interrupt
status bits have two enable bits, Monitor Receive Interrupt Enable (MRE) and MR-bit
Control (MRC). The Monitor channel Data Acknowledged (MDA) and Monitor channel
Data Abort (MAB) interrupt status bits have a common enable bit Monitor Interrupt
Enable (MXE).
MRE prevents the occurrence of the MDR status, including when the first byte of a
packet is received. When MRE is active ("1") but MRC is inactive, the MDR interrupt
status is generated only for the first byte of a receive packet. When both MRE and MRC
are active, MDR is generated and all received Monitor bytes - marked by a low edge in
MX bit - are stored. Additionally, an active MRC enables the control of the MR handshake
bit according to the Monitor channel protocol.
Semiconductor Group
115
11.97