psf21911 ETC-unknow, psf21911 Datasheet - Page 116

• Manufacturer Part Number: psf21911
• Description: Isdn Echocancellation Circuit Terminal Applications Iec-q
• Manufacturer: ETC-unknow

Semiconductor Group
4.2
ISTA-Register
The Interrupt Status Register (ISTA) generates an interrupt for the selected channel.
Interrupt bits are cleared by reading the corresponding register.
Default: 00
7
D:
CICI:
CICU:
SF:
MDR:
B1:
D
H
CICI
Registers
CICU
D-channel Interrupt
D = 1 indicates an interrupt that 8 bits D-channel data have been
updated.
D = 0 occurs after DRI and DRU have been read.
C/I-channel Interrupt
CICI = 1 indicates a change in the C/I-channel on IOM-2.
CICI = 0 occurs after CIRI is read.
C/I-channel Interrupt
CICU = 1 indicates a change in the C/I-channel coming from the
U-interface.
CICU = 0 occurs after CIRU is read.
Superframe Marker
SF = 1 indicates a superframe marker received from the U-
interface.
SF = 0 occurs when the ISTA-Register has been read.
Monitor Data Receive Interrupt
MDR = 1 indicates an interrupt after the MOSR:MDR or the
MOSR:MER bits have been activated.
MDR = 0 indicates the inactive interrupt status.
B1-channel Interrupt
B1 = 1 indicates an interrupt every time B1-channel bytes arrive.
B1 = 0 occurs after RB1I and RB1U have been read.
SF
MDR
Read
116
B1
B2
MDA
Register Description
0
PSB 21911
PSF 21911
Address 0
0
H
11.97
H