psf21911 ETC-unknow, psf21911 Datasheet - Page 79

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psf21911

Manufacturer Part Number
psf21911
Description
Isdn Echocancellation Circuit Terminal Applications Iec-q
Manufacturer
ETC-unknow
Datasheet
PSB 21911
PSF 21911
U-Transceiver
Figure 24 DAC-Output for a Single Pulse
Output Stage
The output stage consists of two identical buffers, operated in a differential mode. This
concept allows an output-voltage swing of 6.4 Vpp at the output pins of the IEC-Q TE.
The buffers are optimized for:
– High output swing
– High linearity
– Low quiescent current to minimize power consumption
The output jitter produced by the transmitter (with jitter-free input signals) is below 0.02
UIpp (Unit intervall = 12.5 s, peak-peak) measured with a high-pass filter of 30-Hz
cutoff frequency. Without the filter the cutoff frequency is below 0.1 UIpp.
Analog Loop-Back Function
The loop-back C/I command ARL activates an internal, analog loop-back. This loop-back
is closed near the U-interface. All signals received on AIN / BIN will neither be evaluated
nor recognized after reaching the “Synchronized” state in NT-mode.
Level Detect
The level detect circuit evaluates the differential signal between AIN and BIN. The
differential threshold level is between 4 mV and 28 mV. The DC-level (common mode
level) may be between 0 V and 3 V. Level detect is not effected by the range setting.
Semiconductor Group
79
11.97

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