tda6651tt/c3/s3 NXP Semiconductors, tda6651tt/c3/s3 Datasheet - Page 14

• Manufacturer Part Number: tda6651tt/c3/s3
• Description: 5 V Mixer/oscillator And Low Noise Pll Synthesizer For Hybrid Terrestrial Tuner Digital And Analog
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 18.
[1]
[2]
[3]
TDA6650TT_6651TT_5
Product data sheet
Name
Address byte
Divider byte 1 (DB1)
Divider byte 2 (DB2)
Control byte 1 (CB1)
Control byte 2 (CB2)
X means that this bit is not set or reset at power-on reset.
The next six bits are written, when bit T/A = 1 in a write sequence.
The next six bits are written, when bit T/A = 0 in a write sequence.
Default setting at power-on reset
8.3 Status at power-on reset
Byte
1
2
3
4
5
Table 16.
Table 17.
[1]
At power on or when the supply voltage drops below approximately 2.85 V (at
T
At power on, the charge pump current is set to 580 A, the test bits T[2:0] are set to 110
which means that the charge pump is sinking current, the tuning voltage output is disabled
and the ALBC function is disabled. The XTOUT buffer is on, driving the 4 MHz signal from
the crystal oscillator and all the ports are off. As a consequence, the high band is selected
by default.
Bit
ALBC
AGC
A2, A1, A0
Voltage applied to pin ADC
0.6V
0.45V
0.3V
0.15V
0 V to 0.15V
amb
Accuracy is 0.03V
uses the same pin as the ADC and can not be used when the ADC is in use.
CC
CC
= 25 C), internal registers are set according to
CC
CC
Bit
MSB
1
0
N7 = X
1
1
CP2 = 1
to V
to 0.45V
to 0.6V
to 0.3V
[1]
Description of read data format bits
ADC levels
CC
CC
CC
CC
CC
1
N14 = X
N6 = X
T/A = X
T/A = X
CP1 = 1
Description
automatic loop bandwidth control flag
internal AGC flag
digital outputs of the 5-level ADC; see
CC
ALBC = 0, no automatic loop bandwidth control
ALBC = 1, automatic loop bandwidth control selected
AGC = 0 when internal AGC is active (V
AGC = 1 when internal AGC is not active (V
. Bit BS5 must be set to logic 0 to disable the BS5 output port. The BS5 output port
Rev. 05 — 10 January 2007
[2]
[3]
[1]
0
N13 = X
N5 = X
T2 = 1
0
CP0 = 1
5 V mixer/oscillator and low noise PLL synthesizer
TDA6650TT; TDA6651TT
0
N12 = X
N4 = X
T1 = 1
0
BS5 = 0
…continued
0
N11 = X
N3 = X
T0 = 0
ATC = 0
BS4 = 0
Table 17
Table
AGC
A2
1
0
0
0
0
18.
AGC
MA1
N10 = X
N2 = X
R2 = X
AL2 = 0
BS3 = 0
< V
RML
> V
)
RMH
A1
0
1
1
0
0
MA0
N9 = X
N1 = X
R1 = X
AL1 = 1
BS2 = 0
)
© NXP B.V. 2007. All rights reserved.
A0
0
1
0
1
0
LSB
X
N8 = X
N0 = X
R0 = X
AL0 = 0
BS1 = 0
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