tda6651tt/c3/s3 NXP Semiconductors, tda6651tt/c3/s3 Datasheet - Page 9

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tda6651tt/c3/s3

Manufacturer Part Number
tda6651tt/c3/s3
Description
5 V Mixer/oscillator And Low Noise Pll Synthesizer For Hybrid Terrestrial Tuner Digital And Analog
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 6.
[1]
TDA6650TT_6651TT_5
Product data sheet
Name
Address byte
Divider byte 1 (DB1)
Divider byte 2 (DB2)
Control byte 1 (CB1);
see
Control byte 2 (CB2)
Fig 4. Example of I
MSB is transmitted first.
Table 7
START
I
2
C-bus write data format
ADDRESS
BYTE
2
C-bus transmission frame
Byte
1
2
3
4
5
Table 7.
Bit
A
MA1 and MA0
R/W
N14 to N0
T/A
T2, T1 and T0
R2, R1 and R0
ATC
AL2, AL1 and AL0
CP2, CP1 and CP0
BS5, BS4, BS3, BS2
and BS1
DIVIDER
BYTE 1
Bit
MSB
1
0
N7
1
1
CP2
DIVIDER
BYTE 2
I
2
Description of write data format bits
C-bus transmission dedicated to
[1]
CONTROL
1
N14
N6
T/A = 1
T/A = 0
CP1
the MOPLL
BYTE 1
Description
acknowledge
programmable address bits; see
logic 0 for write mode
programmable LO frequency;
N = N14
test/AGC bit
test bits; see
reference divider ratio and programmable frequency step; see
AGC current setting and time constant; capacitor on pin AGC = 150 nF
AGC take-over point bits; see
charge pump current; see
PMOS ports control bits
Rev. 05 — 10 January 2007
T/A = 0: the next 6 bits sent are AGC settings
T/A = 1: the next 6 bits sent are test and reference divider ratio settings
ATC = 0: AGC current = 220 nA; AGC time constant = 2 s
ATC = 1: AGC current = 9 A; AGC time constant = 50 ms
BSn = 0: corresponding port is off, high-impedance state (status at
power-on reset)
BSn = 1: corresponding port is on; V
CONTROL
0
N13
N5
T2
0
CP0
BYTE 2
2
14
Table 9
+ N13
CONTROL
5 V mixer/oscillator and low noise PLL synthesizer
0
N12
N4
T1
0
BS5
BYTE 1
TDA6650TT; TDA6651TT
2
13
CONTROL
BYTE 2
0
N11
N3
T0
ATC
BS4
Table 12
+ N12
Table 11
Table 8
STOP
2
MA1
N10
N2
R2
AL2
BS3
12
O
+ ... + N1
= V
50 s
CC
MA0
N9
N1
R1
AL1
BS2
V
DS(sat)
2
I
START
2
1
C-bus transmission
+ N0
dedicated to
another IC
© NXP B.V. 2007. All rights reserved.
LSB
R/W = 0 A
N8
N0
R0
AL0
BS1
ADDRESS
BYTE
Table 10
fce921
Ack
A
A
A
A
A
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