cy62127dv30ll-70zsi Cypress Semiconductor Corporation., cy62127dv30ll-70zsi Datasheet - Page 7
![no-image](/images/manufacturer_photos/0/1/180/cypress_semiconductor_corporation__sml.jpg)
cy62127dv30ll-70zsi
Manufacturer Part Number
cy62127dv30ll-70zsi
Description
1 Mb 64k X 16 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY62127DV30LL-70ZSI.pdf
(12 pages)
Document #: 38-05229 Rev. *D
Switching Waveforms
Write Cycle No. 1 (WE Controlled)
Write Cycle No. 2 (CE Controlled)
Notes:
19. Data I/O is high-impedance if OE = V
20. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
21. During the DON'T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
ADDRESS
ADDRESS
DATA I/O
DATA I/O
BHE / BLE
BHE/BLE
CE
CE
WE
OE
WE
OE
DON'T CARE
DON'T CARE
(continued)
IH
t
SA
.
t
HZOE
t
HZOE
[14, 15, 19, 20, 21]
[14, 15, 19, 20, 21]
t
SA
t
AW
t
AW
t
SCE
t
WC
t
WC
t
BW
t
BW
DATA
t
t
PWE
SD
DATA
t
t
PWE
SD
IN
t
IN
SCE
VALID
VALID
t
HA
t
HA
t
HD
t
HD
CY62127DV30
MoBL
Page 7 of 12
®