cy14b101l Cypress Semiconductor Corporation., cy14b101l Datasheet - Page 6

• Manufacturer Part Number: cy14b101l
• Description: 1-mbit 128k X 8 Nvsram
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 001-06400 Rev. *D
Data Protection
The CY14B101L protects data from corruption during
low-voltage conditions by inhibiting all externally initiated
STORE and WRITE operations. The low voltage condition is
detected when V
WRITE mode (both CE and WE low) at power-up, after a
RECALL, or after a STORE, the WRITE will be inhibited until
a negative transition on CE or WE is detected.
This protects against inadvertent writes during power-up or
brown-out conditions.
Noise Considerations
The CY14B101L is a high-speed memory and so must have a
high-frequency bypass capacitor of approximately 0.1 µF
connected between V
are as short as possible. As with all high-speed CMOS ICs,
careful routing of power, ground and signals will reduce circuit
noise.
Low Average Active Power
CMOS technology provides the CY14B101L the benefit of
drawing significantly less current when it is cycled at times
longer than 50 ns. Figure 2 shows the relationship between
I
consumption is shown for commercial temperature range, V
= 3.6V, and chip enable at maximum frequency. Only standby
current is drawn when the chip is disabled. The overall
average current drawn by the CY14B101L depends on the
following items:
CC
and READ/WRITE cycle time. Worst-case current
CC
< V
CC
and V
SWITCH
SS
. If the CY14B101L is in a
, using leads and traces that
PRELIMINARY
CC
1. The duty cycle of chip enable.
2. The overall cycle rate for accesses.
3. The ratio of READs to WRITEs.
4. The operating temperature.
5. The V
6. I/O loading.
CC
level.
Figure 2. Current vs. Cycle Time
CY14B101L
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