hyb18m1g16 Qimonda, hyb18m1g16 Datasheet - Page 34

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hyb18m1g16

Manufacturer Part Number
hyb18m1g16
Description
Drams For Mobile Applications 1-gbit X16 Ddr Mobile-ram Rohs Compliant
Manufacturer
Qimonda
Datasheet
Data for any WRITE burst may be concatenated with or truncated with a subsequent WRITE command. In either case, a
continuous flow of input data can be maintained. The new WRITE command can be issued on any clock cycle following the
previous WRITE command. The first data element from the new burst is applied after either the last element of a completed
burst or the last desired data element of a longer burst which is being truncated. The new WRITE command should be issued
x clock cycles after the first WRITE command, where x equals the number of desired data element pairs (pairs are required by
the 2n pre fetch architecture).
Figure 25
Rev.1.0, 2007-03
10242006-Y557-TZXW
Command
Address
DI b = Data In to column b.
3 subsequent elements of Data In are applied in the programmed order following DI b.
A non-interrupted burst of 4 is shown.
A10 is LOW with the WRITE command (Auto Precharge is disabled)
DQS
DQS
shows concatenated WRITE bursts of 4.
DM
DM
DQ
DQ
CK
CK
BA,Col b
WRITE
t
DQSSmin
t
DQSSmax
Di b
NOP
Di b
NOP
34
NOP
WRITE Burst (min. and max. t
NOP
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
FIGURE 24
= Don't Care
NOP
Data Sheet
DQSS
)

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