hyb18m1g16 Qimonda, hyb18m1g16 Datasheet - Page 36
hyb18m1g16
Manufacturer Part Number
hyb18m1g16
Description
Drams For Mobile Applications 1-gbit X16 Ddr Mobile-ram Rohs Compliant
Manufacturer
Qimonda
Datasheet
1.HYB18M1G16.pdf
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Full-speed random WRITE accesses within a page or pages can be performed as shown in
Rev.1.0, 2007-03
10242006-Y557-TZXW
Command
Command
Address
DI b (n) = Data In to column b (or column n).
3 subsequent elements of Data In are applied in the programmed order following DI b.
3 subsequent elements of Data In are applied in the programmed order following DI n.
Non-interrupted bursts of 4 are shown.
Each WRITE command may be to any active bank and may be to the same or different devices.
Address
DI b etc. = Data In to column b, etc. .
b', etc. = the next Data In following DI b, etc. according to the programmed burst order
Programmed burst length = 2, 4, 8 or 16 in cases shown. If burst of 4, 8 or 16, burst would be truncated.
Each WRITE command may be to any active bank and may be to the same or different devices.
DQS
DQS
DM
DQ
DM
CK
CK
DQ
CK
CK
BA,Col b
BA,Col b
WRITE
WRITE
t
t
DQSSmax
DQSSmax
BA,Col x
WRITE
NOP
Di b
Di b
Di b'
BA,Col n
WRITE
NOP
36
Di x
Non-Consecutive WRITE to WRITE (max. t
Di x'
BA,Col n
BA,Col a
WRITE
WRITE
Di n
Random WRITE Cycles (max. t
Di n'
BA,Col g
WRITE
NOP
Figure
Di n
HY[B/E]18M1G16[0/1]BF
Di a
1-Gbit DDR Mobile-RAM
27.
Di a'
FIGURE 26
FIGURE 27
= Don't Care
= Don't Care
NOP
NOP
Data Sheet
DQSS
DQSS
)
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