s-24cs64a Seiko Instruments Inc., s-24cs64a Datasheet - Page 14

• Manufacturer Part Number: s-24cs64a
• Description: 2-wire Cmos Serial E2prom
• Manufacturer: Seiko Instruments Inc.

14
2-WIRE CMOS SERIAL E
S-24CS64A
6.3 Write Protection
6.4 Acknowledge Polling
Write protection is available in the S-24CS64A. When the WP pin is connected to the V
to memory area is forbidden at all.
When the WP pin is connected to the GND, the write protection is invalid, and write operation in all
memory area is available.
Fix the level of the WP pin from the rising edge of SCL for loading the last write data (D0) until the end of
the write time (10 ms max.). If the WP pin changes during this time, the address data being written at this
time is not guaranteed.
There is no need for using write protection, the WP pin should be connected to the GND. The write
protection is valid in the operating voltage range.
Acknowledge polling is used to know the completion of the write cycle in the E
After the E
and no response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in the E
detecting a response from the slave device after transmitting the start condition, the device address and
the read / write instruction code to the E
That is, if the E
E
Keep the level of the WP pin fixed until acknowledge is confirmed.
It is recommended to use the read instruction “1” as the read / write instruction code transmitted by the
master device.
SCL
SDA
WP
2
PROM generates an acknowledge, the write cycle has been completed.
Write Data
2
PROM receives a stop condition and once starts the write cycle, all operations are forbidden
2
PROM does not generate an acknowledge, the write cycle is in progress and if the
D0
2
PROM
Acknowledge
Figure 14 WP Pin Fixed Period
2
PROM, namely to the slave devices.
Seiko Instruments Inc.
WP Pin Fixed Period
Condition
Stop
t
WR
2
PROM.
Condition
CC
Start
, write operation
Rev.4.1
2
PROM by
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