m29dw256g Numonyx, m29dw256g Datasheet - Page 13

• Manufacturer Part Number: m29dw256g
• Description: 256-mbit X16, Multiple Bank, Page, Dual Boot 3 V Supply Flash Memory
• Manufacturer: Numonyx

When VPP/write protect is High, VIH, the memory reverts to the previous protection status
of the four outermost blocks. Program and erase operations can now modify the data in
these blocks unless the blocks are protected using block protection.
When V
bypass mode (see
When V
Table 15: Program/erase times and program/erase endurance
When V
bypass program operations the memory draws I
circuits. See the description of the Unlock Bypass command in the command interface
section. The transitions from V
(see
Never raise V
memory may be left in an indeterminate state. A 0.1 μF capacitor should be connected
between the V
from the power supply. The PCB track widths must be sufficient to carry the currents
required during unlock bypass program (see I
characteristics).
The V
pull-up.
Refer to
Table 4.
Figure 19: Accelerated program timing
PP
V
PP
PP
PP
V
PP
/write protect pin may be left floating or unconnected because it features an internal
Table 4
V
V
PPH
/WP
IH
IL
/write protect is raised to V
/write protect is raised to V
/write protect returns to V
V
PP
PP
PP
/write protect to V
for a summary of V
/write protect pin and the V
/WP functions
Section 6.2: Unlock Bypass
Four outermost parameter blocks (first two and last two) are protected from
program/erase operations.
Four outermost parameter blocks (first two and last two) are unprotected
unless a software protection is activated (see
protection).
Unlock bypass mode. It supplies the current needed to speed up
programming.
IH
to V
PPH
IH
PP
PPH
PPH
PPH
from any mode except read mode, otherwise the
/WP functions.
or V
, the execution time of the command is lower (see
and from V
the memory automatically enters the unlock
IL
SS
waveforms).
normal operation resumes. During unlock
PP1
ground pin to decouple the current surges
command).
PP
, I
PP2
from the pin to supply the programming
Function
PPH
, I
PP3
to V
, I
IH
PP4
cycles).
Section 4: Hardware
must be slower than t
in
Table 22: DC
VHVPP
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